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DFI K6bv3+: maximum cacheable memory?
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pigdos
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PostPosted: Fri Jul 07, 2006 6:57 am    Post subject: DFI K6bv3+: maximum cacheable memory? Reply with quote

I have a DFI k6bv3+ w/2MB L2 cache. I'm figuring that if the VA503+ can
cache 256MB w/1MB of L2 cache the k6bv3+ can probably cache 512MB w/2MB of
L2 cache? The tag RAM size would be the determining factor here right? I'm
assuming write-through mode for the L2 cache.

--
Doug
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Alex Zorrilla
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PostPosted: Fri Jul 07, 2006 10:09 pm    Post subject: Re: DFI K6bv3+: maximum cacheable memory? Reply with quote

Yes, that is correct for the MVP3/MVP4. If you were using write-back
mode for the L2 cache, that would limit you to 1/2 the cacheable RAM, so
that would be 256 MB with 2 MB L2 cache. For write-through, a 2 MB L2
cache would give you 512 MB cacheable RAM.




pigdos wrote:
Quote:
I have a DFI k6bv3+ w/2MB L2 cache. I'm figuring that if the VA503+ can
cache 256MB w/1MB of L2 cache the k6bv3+ can probably cache 512MB w/2MB of
L2 cache? The tag RAM size would be the determining factor here right? I'm
assuming write-through mode for the L2 cache.
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farmuse
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PostPosted: Sat Jul 08, 2006 3:18 pm    Post subject: Re: DFI K6bv3+: maximum cacheable memory? Reply with quote

I was under the impression that it was more dependent on the CPU used
than any BIOS setting. The K6-2 can cache 256, where as the K 6 III line
can cache much more than that. I doubt if either board would be able to
use 512 MB modules, so 512 total would be the max with a K 6 III.



Alex Zorrilla wrote:
Quote:
Yes, that is correct for the MVP3/MVP4. If you were using write-back
mode for the L2 cache, that would limit you to 1/2 the cacheable RAM, so
that would be 256 MB with 2 MB L2 cache. For write-through, a 2 MB L2
cache would give you 512 MB cacheable RAM.




pigdos wrote:

I have a DFI k6bv3+ w/2MB L2 cache. I'm figuring that if the VA503+
can cache 256MB w/1MB of L2 cache the k6bv3+ can probably cache 512MB
w/2MB of L2 cache? The tag RAM size would be the determining factor
here right? I'm assuming write-through mode for the L2 cache.
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pigdos
Guest





PostPosted: Sun Jul 09, 2006 7:11 am    Post subject: Re: DFI K6bv3+: maximum cacheable memory? Reply with quote

We're not talking about the on-board cache on the CPU we're talking about
the motherboard cache, which could be L2 (if you had a K6, Pentium, K62 or
Cyrix CPU) or L3 (if you had a K62+ or K63+).

--
Doug
"farmuse" <farmuse@cows.net> wrote in message
news:e8ogh1$h9v$1@solaris.cc.vt.edu...
Quote:
I was under the impression that it was more dependent on the CPU used
than any BIOS setting. The K6-2 can cache 256, where as the K 6 III line
can cache much more than that. I doubt if either board would be able to
use 512 MB modules, so 512 total would be the max with a K 6 III.



Alex Zorrilla wrote:
Yes, that is correct for the MVP3/MVP4. If you were using write-back
mode for the L2 cache, that would limit you to 1/2 the cacheable RAM, so
that would be 256 MB with 2 MB L2 cache. For write-through, a 2 MB L2
cache would give you 512 MB cacheable RAM.




pigdos wrote:

I have a DFI k6bv3+ w/2MB L2 cache. I'm figuring that if the VA503+ can
cache 256MB w/1MB of L2 cache the k6bv3+ can probably cache 512MB w/2MB
of L2 cache? The tag RAM size would be the determining factor here
right? I'm assuming write-through mode for the L2 cache.
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John and Karen
Guest





PostPosted: Sun Jul 16, 2006 4:34 am    Post subject: Re: DFI K6bv3+: maximum cacheable memory? Reply with quote

it is dependent on the cpu not the size of the L2

On Sat, 08 Jul 2006 23:11:54 -0400, pigdos <NA@nowhere.com> wrote:

Quote:
We're not talking about the on-board cache on the CPU we're talking about
the motherboard cache, which could be L2 (if you had a K6, Pentium, K62
or
Cyrix CPU) or L3 (if you had a K62+ or K63+).




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Alex Zorrilla
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PostPosted: Mon Jul 17, 2006 4:36 pm    Post subject: Re: DFI K6bv3+: maximum cacheable memory? Reply with quote

In the case of the K6-2, K6, Pentium MMX, Cyrix M-II, and other similar
processors, it is quite dependent on the amount of the L2 cache on the
motherboard. These CPUs do not have their own L2 cache, so the chipsets
designed to run them (e.g., Intel 430TX, VIA MVP3, SiS 5597/5598) make
use of the tag RAM on the motherboard's L2 cache to determine the amount
of cacheable system RAM. The actual amount of cacheable RAM depends on
the chipset, the amount of tag RAM available in the L2, and certain BIOS
settings.

Now, when the L2 was moved to the CPU (Pentium Pro, Pentium II, K6-III,
Athlon), the amount of tag RAM still makes a difference, but now it
becomes a function of the CPU in question, as opposed to the motherboard.





John and Karen wrote:
Quote:
it is dependent on the cpu not the size of the L2

On Sat, 08 Jul 2006 23:11:54 -0400, pigdos <NA@nowhere.com> wrote:

We're not talking about the on-board cache on the CPU we're talking about
the motherboard cache, which could be L2 (if you had a K6, Pentium,
K62 or
Cyrix CPU) or L3 (if you had a K62+ or K63+).




--Using Opera's revolutionary e-mail client: http://www.opera.com/mail/
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John and Karen
Guest





PostPosted: Tue Jul 18, 2006 10:34 pm    Post subject: Re: DFI K6bv3+: maximum cacheable memory? Reply with quote

I know all that, but for the K6 2 vs K6 III is makes a difference.

On Mon, 17 Jul 2006 11:58:15 -0400, Alex Zorrilla <apz@zxeng.com> wrote:

Quote:
In the case of the K6-2, K6, Pentium MMX, Cyrix M-II, and other similar
processors, it is quite dependent on the amount of the L2 cache on the
motherboard. These CPUs do not have their own L2 cache, so the chipsets
designed to run them (e.g., Intel 430TX, VIA MVP3, SiS 5597/5598) make
use of the tag RAM on the motherboard's L2 cache to determine the amount
of cacheable system RAM. The actual amount of cacheable RAM depends on
the chipset, the amount of tag RAM available in the L2, and certain BIOS
settings.

Now, when the L2 was moved to the CPU (Pentium Pro, Pentium II, K6-III,
Athlon), the amount of tag RAM still makes a difference, but now it
becomes a function of the CPU in question, as opposed to the motherboard.





John and Karen wrote:
it is dependent on the cpu not the size of the L2
On Sat, 08 Jul 2006 23:11:54 -0400, pigdos <NA@nowhere.com> wrote:

We're not talking about the on-board cache on the CPU we're talking
about
the motherboard cache, which could be L2 (if you had a K6, Pentium,
K62 or
Cyrix CPU) or L3 (if you had a K62+ or K63+).

--Using Opera's revolutionary e-mail client:
http://www.opera.com/mail/



--
Using Opera's revolutionary e-mail client: http://www.opera.com/mail/
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Alex Zorrilla
Guest





PostPosted: Wed Jul 19, 2006 4:33 pm    Post subject: Re: DFI K6bv3+: maximum cacheable memory? Reply with quote

Ahhh, OK. Now I see what you mean. Agreed.


John and Karen wrote:
Quote:
I know all that, but for the K6 2 vs K6 III is makes a difference.

On Mon, 17 Jul 2006 11:58:15 -0400, Alex Zorrilla <apz@zxeng.com> wrote:

In the case of the K6-2, K6, Pentium MMX, Cyrix M-II, and other
similar processors, it is quite dependent on the amount of the L2
cache on the motherboard. These CPUs do not have their own L2 cache,
so the chipsets designed to run them (e.g., Intel 430TX, VIA MVP3, SiS
5597/5598) make use of the tag RAM on the motherboard's L2 cache to
determine the amount of cacheable system RAM. The actual amount of
cacheable RAM depends on the chipset, the amount of tag RAM available
in the L2, and certain BIOS settings.

Now, when the L2 was moved to the CPU (Pentium Pro, Pentium II,
K6-III, Athlon), the amount of tag RAM still makes a difference, but
now it becomes a function of the CPU in question, as opposed to the
motherboard.





John and Karen wrote:
it is dependent on the cpu not the size of the L2
On Sat, 08 Jul 2006 23:11:54 -0400, pigdos <NA@nowhere.com> wrote:

We're not talking about the on-board cache on the CPU we're talking
about
the motherboard cache, which could be L2 (if you had a K6, Pentium,
K62 or
Cyrix CPU) or L3 (if you had a K62+ or K63+).

--Using Opera's revolutionary e-mail client:
http://www.opera.com/mail/



--Using Opera's revolutionary e-mail client: http://www.opera.com/mail/
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pigdos
Guest





PostPosted: Wed Jul 26, 2006 6:20 pm    Post subject: Re: DFI K6bv3+: maximum cacheable memory? Reply with quote

And you're still wrong because it STILL makes a difference in how much RAM
the motherboard cache can handle REGARDLESS of the type of CPU you have
installed.

--
Doug
"John and Karen" <wythevillecat@earthlink.net> wrote in message
news:op.tcwmrrylqi9s1q@tower.belkin...
Quote:
I know all that, but for the K6 2 vs K6 III is makes a difference.

On Mon, 17 Jul 2006 11:58:15 -0400, Alex Zorrilla <apz@zxeng.com> wrote:

In the case of the K6-2, K6, Pentium MMX, Cyrix M-II, and other similar
processors, it is quite dependent on the amount of the L2 cache on the
motherboard. These CPUs do not have their own L2 cache, so the chipsets
designed to run them (e.g., Intel 430TX, VIA MVP3, SiS 5597/5598) make
use of the tag RAM on the motherboard's L2 cache to determine the amount
of cacheable system RAM. The actual amount of cacheable RAM depends on
the chipset, the amount of tag RAM available in the L2, and certain BIOS
settings.

Now, when the L2 was moved to the CPU (Pentium Pro, Pentium II, K6-III,
Athlon), the amount of tag RAM still makes a difference, but now it
becomes a function of the CPU in question, as opposed to the motherboard.





John and Karen wrote:
it is dependent on the cpu not the size of the L2
On Sat, 08 Jul 2006 23:11:54 -0400, pigdos <NA@nowhere.com> wrote:

We're not talking about the on-board cache on the CPU we're talking
about
the motherboard cache, which could be L2 (if you had a K6, Pentium,
K62 or
Cyrix CPU) or L3 (if you had a K62+ or K63+).

--Using Opera's revolutionary e-mail client:
http://www.opera.com/mail/



--
Using Opera's revolutionary e-mail client: http://www.opera.com/mail/
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farmuse
Guest





PostPosted: Fri Jul 28, 2006 12:12 am    Post subject: Re: DFI K6bv3+: maximum cacheable memory? Reply with quote

I know the FIC 503+ can cache more ram with the K6 III than it can
with the K6-2. there are many instances where this is true, where what
CPU you use makes a difference. There are some P II that can cache a lot
less than other P II that run at the same speed. Believe it or not.
Because the L2 cache is on the K6 III chip itself then it is a different
configuration than with the K6-2.

pigdos wrote:

Quote:
And you're still wrong because it STILL makes a difference in how much RAM
the motherboard cache can handle REGARDLESS of the type of CPU you have
installed.
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pigdos
Guest





PostPosted: Fri Jul 28, 2006 3:02 pm    Post subject: Re: DFI K6bv3+: maximum cacheable memory? Reply with quote

You really don't know much about cache architecture do you? The cache
implemented on the FIC VA503+ or K6bv3+ is entirely independent of the CPU
used. If you have L2 cache on the CPU, the on-board motherboard cache
becomes L3. The CPU used DOESN'T make a difference at ALL in the amount of
cacheable memory w.r.t. the motherboard cache. The tag RAM (and how it's
configured [write-through or write-back]) and cache size on the motherboard
are the ONLY determining factors in how much memory is cacheable on the FIC
VA503+ or DFI K6bv3.

--
Doug
"farmuse" <farmuse@cows.net> wrote in message
news:eab6os$9qr$1@solaris.cc.vt.edu...
Quote:
I know the FIC 503+ can cache more ram with the K6 III than it can
with the K6-2. there are many instances where this is true, where what CPU
you use makes a difference. There are some P II that can cache a lot less
than other P II that run at the same speed. Believe it or not. Because the
L2 cache is on the K6 III chip itself then it is a different configuration
than with the K6-2.

pigdos wrote:

And you're still wrong because it STILL makes a difference in how much
RAM the motherboard cache can handle REGARDLESS of the type of CPU you
have installed.
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John and Karen
Guest





PostPosted: Sun Jul 30, 2006 10:43 am    Post subject: Re: DFI K6bv3+: maximum cacheable memory? Reply with quote

two words, bull ***. You are clueless. It is well documented the K6
III can cache more ram than a K6-2, ask anyone on this newsgroup. I have
been building computers for nine years, and have used many FIC
motherboards. So you just go on and believe what you want. I mean why did
you come here in the first place ?


On Fri, 28 Jul 2006 10:47:25 -0400, pigdos <NA@nowhere.com> wrote:

Quote:
You really don't know much about cache architecture do you? The cache
implemented on the FIC VA503+ or K6bv3+ is entirely independent of the
CPU
used. If you have L2 cache on the CPU, the on-board motherboard cache
becomes L3. The CPU used DOESN'T make a difference at ALL in the amount
of
cacheable memory w.r.t. the motherboard cache. The tag RAM (and how it's
configured [write-through or write-back]) and cache size on the
motherboard
are the ONLY determining factors in how much memory is cacheable on the
FIC
VA503+ or DFI K6bv3.




--
Using Opera's revolutionary e-mail client: http://www.opera.com/mail/
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John and Karen
Guest





PostPosted: Sun Jul 30, 2006 11:03 am    Post subject: Re: DFI K6bv3+: maximum cacheable memory? Reply with quote

scroll down and see that the K6 III can cache 4 GB total ram. You did
not state what CPU you plan on using. You might be right, with 2 MB
external L2 cache on the motherboard the total ram that can be cached
might go up to 512 MB or maybe even 768, when using a K6-2. With the K6
III of any flavor, I know it can use all 768 when using the DFI board you
have.

http://www.sandpile.org/impl/k6.htm


On Fri, 28 Jul 2006 10:47:25 -0400, pigdos <NA@nowhere.com> wrote:

Quote:
You really don't know much about cache architecture do you? The cache
implemented on the FIC VA503+ or K6bv3+ is entirely independent of the
CPU
used. If you have L2 cache on the CPU, the on-board motherboard cache
becomes L3. The CPU used DOESN'T make a difference at ALL in the amount
of
cacheable memory w.r.t. the motherboard cache. The tag RAM (and how it's
configured [write-through or write-back]) and cache size on the
motherboard
are the ONLY determining factors in how much memory is cacheable on the
FIC
VA503+ or DFI K6bv3.




--
Using Opera's revolutionary e-mail client: http://www.opera.com/mail/
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pigdos
Guest





PostPosted: Mon Jul 31, 2006 2:29 am    Post subject: Re: DFI K6bv3+: maximum cacheable memory? Reply with quote

Do you know what motherboard cache is? Do you realize it has nothing to do
w/the CPU installed? I don't care if you've been installing computers for
nine years
or 20 years (I've been working with computers since 1987, I've worked on the
original IBM PC). It's obvious you don't understand the difference between
cache built into a motherboard (which was common 10 years ago) and that
which resides in the CPU. I was never asking about how much RAM the CPU can
cache.

--
Doug
"John and Karen" <wythevillecat@earthlink.net> wrote in message
news:op.tdhoyqvzqi9s1q@tower.belkin...
Quote:
two words, bull ***. You are clueless. It is well documented the K6
III can cache more ram than a K6-2, ask anyone on this newsgroup. I have
been building computers for nine years, and have used many FIC
motherboards. So you just go on and believe what you want. I mean why did
you come here in the first place ?


On Fri, 28 Jul 2006 10:47:25 -0400, pigdos <NA@nowhere.com> wrote:

You really don't know much about cache architecture do you? The cache
implemented on the FIC VA503+ or K6bv3+ is entirely independent of the
CPU
used. If you have L2 cache on the CPU, the on-board motherboard cache
becomes L3. The CPU used DOESN'T make a difference at ALL in the amount
of
cacheable memory w.r.t. the motherboard cache. The tag RAM (and how it's
configured [write-through or write-back]) and cache size on the
motherboard
are the ONLY determining factors in how much memory is cacheable on the
FIC
VA503+ or DFI K6bv3.




--
Using Opera's revolutionary e-mail client: http://www.opera.com/mail/
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pigdos
Guest





PostPosted: Mon Jul 31, 2006 2:29 am    Post subject: Re: DFI K6bv3+: maximum cacheable memory? Reply with quote

Once again you have the right answer to the WRONG question. You really don't
have a clue do you? Are you even an A+?

--
Doug
"John and Karen" <wythevillecat@earthlink.net> wrote in message
news:op.tdhpwriyqi9s1q@tower.belkin...
Quote:
scroll down and see that the K6 III can cache 4 GB total ram. You did
not state what CPU you plan on using. You might be right, with 2 MB
external L2 cache on the motherboard the total ram that can be cached
might go up to 512 MB or maybe even 768, when using a K6-2. With the K6
III of any flavor, I know it can use all 768 when using the DFI board you
have.

http://www.sandpile.org/impl/k6.htm


On Fri, 28 Jul 2006 10:47:25 -0400, pigdos <NA@nowhere.com> wrote:

You really don't know much about cache architecture do you? The cache
implemented on the FIC VA503+ or K6bv3+ is entirely independent of the
CPU
used. If you have L2 cache on the CPU, the on-board motherboard cache
becomes L3. The CPU used DOESN'T make a difference at ALL in the amount
of
cacheable memory w.r.t. the motherboard cache. The tag RAM (and how it's
configured [write-through or write-back]) and cache size on the
motherboard
are the ONLY determining factors in how much memory is cacheable on the
FIC
VA503+ or DFI K6bv3.




--
Using Opera's revolutionary e-mail client: http://www.opera.com/mail/
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